How to calculate the PSRR for a CMOS inverter? I'm struggling a bit because I do not get meaningful result values. Let explain what I have. I have the following transistor parameters from a simulation result. High-side PMOS: rds2 = 11.67k gm2 = 879.4 uS Low-side NMOS: rds1= 20.35k gm1 = 1.659 mS With that I want to calculate the PSRR. I created the small signal equivalent as shown in the image: http://s7.directupload.net/images/140102/pu4dzkw6.jpg With that I calculate the PSRR: PSRR = dVout / dVdd For doing that I took Kirchhoff's law. dVout = UR1 = IR1 * R1 IR2 - IR1 - gm2 * Vgs2 In small signal equivalent Vgs2 is dVDD. IR1 = IR2 - gm2 * dVdd IR2 = (dVdd - UR1) / R2 IR2 = (dVdd - dVout) / R2 This can be inserted in the equation before: dVout = ((dVdd - dVout) / R2 - gm2 * dVdd) * R1 dVout/dVdd = (R1/R2 - gm2 * R1) / (1 + R1/R2) Inserting now the number values from above unfortunately yields a negative result which can't be true. PSSR = -5.8859 Can somebody please help me to do it the right way? Thanks in advance! Martin

# PSRR of CMOS inverter

Started by ●January 2, 2014

Reply by ●January 2, 20142014-01-02

Martin Gruber <schilling.ro@gmail.com> wrote:> How to calculate the PSRR for a CMOS inverter? > I'm struggling a bit because I do not get meaningful result values. > > Let explain what I have. I have the following transistor parameters from > a simulation result. > > High-side PMOS: > rds2 = 11.67k > gm2 = 879.4 uS > > Low-side NMOS: > rds1= 20.35k > gm1 = 1.659 mS > > With that I want to calculate the PSRR. I created the small signal > equivalent as shown in the image: > http://s7.directupload.net/images/140102/pu4dzkw6.jpg > > With that I calculate the PSRR: > > PSRR = dVout / dVdd > > For doing that I took Kirchhoff's law. > > dVout = UR1 = IR1 * R1 > > IR2 - IR1 - gm2 * Vgs2 > > In small signal equivalent Vgs2 is dVDD. > > IR1 = IR2 - gm2 * dVdd > > IR2 = (dVdd - UR1) / R2 > IR2 = (dVdd - dVout) / R2 > > This can be inserted in the equation before: > > dVout = ((dVdd - dVout) / R2 - gm2 * dVdd) * R1 > > dVout/dVdd = (R1/R2 - gm2 * R1) / (1 + R1/R2) > > Inserting now the number values from above unfortunately yields a > negative result which can't be true. > > PSSR = -5.8859 > > Can somebody please help me to do it the right way? > > Thanks in advance! > MartinWhy can't that be true? It's an inverter with gain, so if dVdd produces something which could be considered a positive voltage excursion at the input, then you should get a negative excursion at the output.

Reply by ●January 2, 20142014-01-02

On Thu, 2 Jan 2014 11:13:32 -0800 (PST), Martin Gruber <schilling.ro@gmail.com> wrote:>How to calculate the PSRR for a CMOS inverter? >I'm struggling a bit because I do not get meaningful result values. > >Let explain what I have. I have the following transistor parameters from a simulation result. > >High-side PMOS: >rds2 = 11.67k >gm2 = 879.4 uS > >Low-side NMOS: >rds1= 20.35k >gm1 = 1.659 mS > >With that I want to calculate the PSRR. I created the small signal equivalent as shown in the image: >http://s7.directupload.net/images/140102/pu4dzkw6.jpg > >With that I calculate the PSRR: > >PSRR = dVout / dVdd > >For doing that I took Kirchhoff's law. > >dVout = UR1 = IR1 * R1 > >IR2 - IR1 - gm2 * Vgs2 > >In small signal equivalent Vgs2 is dVDD. > >IR1 = IR2 - gm2 * dVdd > >IR2 = (dVdd - UR1) / R2 >IR2 = (dVdd - dVout) / R2 > >This can be inserted in the equation before: > >dVout = ((dVdd - dVout) / R2 - gm2 * dVdd) * R1 > >dVout/dVdd = (R1/R2 - gm2 * R1) / (1 + R1/R2) > >Inserting now the number values from above unfortunately yields a negative result which can't be true. > >PSSR = -5.8859 > >Can somebody please help me to do it the right way? > >Thanks in advance! >Martin >I don't know quite _why_ one would want to calculate PSRR for an inverter, but perhaps look at it this way... with input voltage fixed (relative to ground), raising VDD applies more gate drive to the PMOS while the NMOS device would stay with constant drive... so, for an UNBUFFERED inverter one would expect _positive_ gain from VDD to the output. For a _buffered_ inverter it could be anyone's guess... lots of gain and who knows what size-staggering was used.... so I could expect positive and negative values dependent of the designer's whims and the input voltage. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.